The present invention relates to a process for the production of a thin film transistor (TFT) having an optical mask. It is used in microelectronics and optoelectronics and, in particular, in the production of circuits for controlling flat liquid crystal display screens.
The invention more particularly makes it possible to produce thin film transistors based on hydrogenated amorphous silicon (a-Si:H) used in active matrix display screens. The invention also makes it possible to produce thin film transistors having a planar structure in a double gate configuration.
In an active matrix display screen, use is made of an electronic memory formed from memory points distributed over the entire surface of the screen which stores the video signal throughout the duration of the image. An electro-optical transducer is in contact with each memory point and is excited throughout the duration of the image.
In a TFT active matrix, each memory point consequently comprises a TFT and a capacitor, whose dielectric material is constituted by an electro-optical transducer (e.g. a liquid crystal).
FIG. 1 diagrammatically shows in longitudinal section a memory point of an active matrix flat screen on a glass substrate. It is possible to see a lower glass plate 2 supporting a TFT 4 and a transparent electrode 6 of ITO (indium and tin oxide) constituting one of the armatures of the capacitor and the drain 3 of the TFT.
On the plate 2 is also provided the TFT source 8, which is also made from ITO. A hydrogenated amorphous silicon layer 10 constituting the active part of the transistor is in electrical contact with the source 8 and the drain 3 of the TFT. It is covered by a silicon nitride electrical insulating layer 12 and then a metal gate 14 for controlling the transistor made from aluminum. This type of transistor is known as a "gate on top" transistor.
The display screen also has an upper glass plate 16 covered by an ITO transparent counterelectrode 18, which is covered by colored filters 20 in a color display screen. The space between the two transparent plates 2 and 16 is filled with a liquid crystal 22 forming, with the electrode 6 and the counterelectrode 18, the capacitor or image point of the display screen. This screen is illuminated from the rear or upper face with the aid of a light source 24 of the fluorescent tube type. The display is intended to be observed by an observer 26 from the front face which, in this case, is the lower face.
FIG. 1 shows that the hydrogenated amorphous silicon photoconductive material 10 of the TFT is protected from the light source 24 by the metal gate 14 of the transistor. Thus, the light flux from the light source 24 has no effect on the electrical characteristics of the TFT.
However, any light source placed on the side of the observer 26 (e.g. the sun, light source of the work station, etc.), illuminates the photoconductive material 10 across the transparent support plate 2 and the quality of the contrast of the observed image is sensitive to the luminous environment surrounding the observer. Thus, if the light is intense, a photocurrent is produced in the layer 10 reducing the screen contrast, because the I.sub.on /I.sub.off ratio decreases, I.sub.on and I.sub.off respectively representing the current supplied by the transistor of a displayed point and an undisplayed point.
A first object of the invention is consequently to limit this effect by interposing between the photoconductive hydrogenated amorphous silicon and the glass plate an optical mask.
French Patent No. 2,638,880, which was filed in the name of the French State, describes the production of an absorbent, polyimide optical mask formed on the lower transparent plate between the transistor source and drain and below the hydrogenated amorphous silicon. This optical mask also makes it possible to obtain a planar structure.
The article by T. Sunata et al. "A large-area high-resolution active matrix color LCD addressed by a-Si TFT's", Proceedings of the Society for Information Display (SID), 27, 1986, No. 3, pp. 229-234, describes an optical mask constituted by an etched chromium layer placed between a continuous, silicon nitride passivating layer and the glass plate. The passivating layer then serves as a support for the active matrix of the screen.
This procedure requires two vacuum depositions, as well as a specific masking level in order to define the shape and location of the optical mask below the transistors. This supplementary masking level requires great alignment accuracy of the mask relative to the source and drain contact of the transistors. Therefore, this procedure is relatively complex and complicated and is, therefore, expensive.